3DREAM: 3D-Printed Realtime Ambisonic Microphone https://team.inria.fr/emeraude/3dream/
  • Tcl 43.7%
  • VHDL 38.1%
  • C 9.3%
  • CMake 5.3%
  • Linker Script 2.8%
  • Other 0.8%
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2026-07-31 12:18:28 +02:00
bd Update project 2026-07-19 17:22:06 +02:00
board_files Initial commit 2026-03-11 14:20:55 +01:00
constraints Remove all I2S reference 2026-07-21 16:54:20 +02:00
ext_data Added CIC Compensate filter (FIR) 2026-07-07 16:49:00 +02:00
hdl Fix coefficients for IIR DC Removal filter 2026-07-31 11:07:29 +02:00
ip_block Remove all I2S reference 2026-07-21 16:54:20 +02:00
modules Update project 2026-07-19 17:22:06 +02:00
scripts Updated project generation 2026-07-30 19:26:05 +02:00
software/recorder_sd_dma Added software 2026-07-19 17:51:04 +02:00
testbenches Fix coefficients for IIR DC Removal filter 2026-07-31 11:07:29 +02:00
tools/dataGeneratorPDM Refactoring, cleaning, and documenting 2026-03-26 10:21:11 +01:00
.gitignore Code cleanup and renaming 2026-07-08 11:51:37 +02:00
.gitmodules Move lib_common to a dedicated submodule 2026-03-27 15:47:42 +01:00
README.md Update README 2026-07-31 12:18:28 +02:00

3DREAM: 3D-Printed Realtime Ambisonic Microphone

Note

This project was made with Vivado 2025.2

Compatible boards

This project was initially designed to support the following development boards.

Brand Commercial name Manufacturer ID Board name Part name Tested
Trenz Electronic ArduZynq TE0723-04-41C68-A trenz.biz:te0723_m:part0:2.1 xc7z010clg225-1 Yes
Trenz Electronic DIPFORTy1 TE0722-04-41I-4-A trenz.biz:te0722_10_1i:part0:1.0 xc7z010clg225-1 No

Note

Board files are avaible on Trenz Electronic website

Generate the project

Run the following command in a terminal

vivado -source scripts/gen_project.tcl  -mode batch

or inside Vivado TCL console, run

cd /root/of/the/project/
source scripts/gen_project.tcl

File structure

.
├── bd             # Block designs
├── board_files    # Contains board file information
├── constraints    # Time constraints, I/O layout, Port Mapping…
├── ext_data       # External data
├── hdl            # HDL modules
├── ip_block       # Xilinx IP configuration files
├── modules        # External HDL librairies
├── projects       # Project will be generated inside this folder (`.gitignore` is set to ignore this folder)
├── scripts        # TCL automatisation scripts (e.g. generating a new project)
├── software       # Software application running on the Processing System part of the FPGA
├── testbenches    # HDL, wave configuration, input data
└── tools          # Useful dev tools (e.g generate input data for testbenches)